The present invention relates to a semiconductor device and a manufacturing method thereof which can be suited for use, for example, for a semiconductor device equipped with a semiconductor element formed on a semiconductor substrate and a manufacturing method of the semiconductor device.
A semiconductor device widely used has a memory cell region having a memory cell, for example, a nonvolatile memory formed on a semiconductor substrate and a peripheral circuit region having a peripheral circuit comprised of, for example, a MISFET (metal insulator semiconductor field effect transistor) formed on the semiconductor substrate. As the nonvolatile memory, a memory cell comprised of a split-gate type cell using a MONOS (metal-oxide-nitride-oxide-semiconductor) is sometimes formed. In this case, the memory cell is comprised of two MISFETs, that is, a control transistor having a control gate electrode and a memory transistor having a memory gate electrode. The memory gate electrode is formed by leaving a conductive film in sidewall spacer form on the side surface of the control gate electrode via an insulating film.
Japanese Unexamined Patent Application Publication No. 2014-154789 (Patent Document 1) discloses a technology of forming, in a manufacturing method of a semiconductor device, a control gate electrode and a memory gate electrode for memory cell in a memory cell region and then forming a gate electrode for MISFET in a peripheral circuit region.
Japanese Unexamined Patent Application Publication No. 2014-204041 (Patent Document 2) discloses a technology of forming, in a manufacturing method of a semiconductor device, a gate electrode for first MISFET and a dummy gate electrode for second MISFET and then after removal of the dummy gate electrode, forming a gate electrode for second MISFET in a region from which the dummy gate electrode has been removed.
Japanese Unexamined Patent Application Publication No. 2011-49282 (Patent Document 3) discloses a technology of forming, in a semiconductor device, a gate electrode made of a polysilicon film in a MONOS memory formation region, forming a gate electrode made of a polysilicon film in a high-voltage MISFET formation region, and forming a metal gate electrode made of a metal film in a low-voltage MISFET formation region.